Digital Verification Engineer(J11775)

1. Participate in formulating verification strategies, solutions, and plans at the chip or module level. 2. Use SystemVerilog to build reusable and automated verification platforms for module and subsystem levels. 3. Develop and execute directed or constrained-random tests based on design specifications and architecture documents to achieve comprehensive functional coverage. 4. Define and an…… 完整岗位描述与官方投递入口,请登录后在岗位详情页查看。

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