DFT Engineer

1. Define chip level DFT test spec and test structure. 2. Be responsible for DFT flow/methodology evolvement, DFT logic implementation and verification, including the design, implementation, and verification of DFT IP. Covering standard DFT structures such as MBIST, Scan, Boundary Scan, and custom DFT IP. 3. Be responsible for pattern generation along with pre-layout simulation/post-layout sim…… 完整岗位描述与官方投递入口,请登录后在岗位详情页查看。

本站当前在招 390 个成都技术研发岗位，其中 79 个公开标注了薪资。按这些标注统计：月薪（税前）主流区间 12K ~ 18K（25~75 分位），中位约 12K，最低 3.5K、最高 70K。