Serdes Analog top designer(J11321)

1. Analog top integration; 2. Analog schedule tracking and management; 3. Involved in analog ip spec definition; 4. Overall management on analog ip and serdes link test and debug; 5. Support CP/FT, reliability test, ESD, Latch-up, signal-integrity test, EMC test that everything leading to mass production; 【任职要求】 1. MSEE with 5+ years’ experience analog circuit design; 2. Hands-on experience in ci…… 完整岗位描述与官方投递入口,请登录后在岗位详情页查看。

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